Skip to content
  1. Sep 11, 2020
  2. Sep 04, 2020
  3. Aug 28, 2020
  4. Aug 25, 2020
  5. Aug 21, 2020
    • Yang Shen's avatar
      crypto: hisilicon/qm - fix the process of register algorithms to crypto · 3d29e98d
      Yang Shen authored
      
      
      When the devices are removed or not existing, the corresponding algorithms
      which are registered by 'hisi-zip' driver can't be used.
      
      Move 'hisi_zip_register_to_crypto' from 'hisi_zip_init' to
      'hisi_zip_probe'. The algorithms will be registered to crypto only when
      there is device bind on the driver. And when the devices are removed,
      the algorithms will be unregistered.
      
      In the previous process, the function 'xxx_register_to_crypto' need a lock
      and a static variable to judge if the registration is the first time.
      Move this action into the function 'hisi_qm_alg_register'. Each device
      will call 'hisi_qm_alg_register' to add itself to qm list in probe process
      and registering algs when the qm list is empty.
      
      Signed-off-by: default avatarYang Shen <shenyang39@huawei.com>
      Reviewed-by: default avatarZhou Wang <wangzhou1@hisilicon.com>
      Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
      3d29e98d
    • Weili Qian's avatar
      crypto: hisilicon/qm - fix the call trace when unbind device · daa31783
      Weili Qian authored
      
      
      Call trace will appear in the Hisilicon crypto driver unbinding or
      disabling SRIOV during task running with TFMs on the corresponding
      function.
      The log looks like this:
      	[  293.908078] Call trace:
      	[  293.908080]  __queue_work+0x494/0x548
      	[  293.908081]  queue_work_on+0x84/0xd8
      	[  293.908092]  qm_irq+0x4c/0xd0 [hisi_qm]
      	[  293.908096]  __handle_irq_event_percpu+0x74/0x2a0
      	[  293.908098]  handle_irq_event_percpu+0x40/0x98
      	[  293.908099]  handle_irq_event+0x4c/0x80
      	[  293.908101]  handle_fasteoi_irq+0xb0/0x170
      	[  293.908102]  generic_handle_irq+0x3c/0x58
      	[  293.908103]  __handle_domain_irq+0x68/0xc0
      	[  293.908104]  gic_handle_irq+0xb4/0x298
      	[  293.908105]  el1_irq+0xcc/0x180
      	[  293.908107]  arch_cpu_idle+0x38/0x228
      	[  293.908110]  default_idle_call+0x20/0x40
      	[  293.908113]  do_idle+0x1cc/0x2b8
      	[  293.908114]  cpu_startup_entry+0x2c/0x30
      	[  293.908115]  rest_init+0xdc/0xe8
      	[  293.908117]  arch_call_rest_init+0x14/0x1c
      	[  293.908117]  start_kernel+0x490/0x4c4
      
      This patch adds a waiting logic as user doing the above two operations
      to avoid panic. The two operations will hold on in the driver
      remove function until the tasks release all their relative TFMs.
      
      Signed-off-by: default avatarHui Tang <tanghui20@huawei.com>
      Signed-off-by: default avatarWeili Qian <qianweili@huawei.com>
      Signed-off-by: default avatarYang Shen <shenyang39@huawei.com>
      Reviewed-by: default avatarZhou Wang <wangzhou1@hisilicon.com>
      Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
      daa31783
    • Yang Shen's avatar
      crypto: hisilicon/qm - register callback function to 'pci_driver.shutdown' · 64dfe495
      Yang Shen authored
      
      
      Since the drivers such as HPRE/SEC/ZIP do not implement
      'pci_driver.shutdow', a RAS will be triggered at OS rebooting or shutting
      down as the hardware device is processing request.
      The log looks like this:
      	NOTICE:  [NimbusSecNodeType1]:[2372L]This is sec, Base = 0x141800000
      	NOTICE:  [NimbusSecHandle]:[2319L] SecIntSt = 0x3
      	NOTICE:  [NimbusSecHandle]:[2320L] SecQmIntStatus = 0x2
      	NOTICE:  [PrintSecurityType]:[344L] SecurityType is RECOVERABLE!
      
      This patch offers a new API in qm to shutdown devices, and add shutdown
      callbacks in ACC driver based on this new API.
      
      So the running devices will be stopped when the OS reboot or shutdown.
      
      Signed-off-by: default avatarYang Shen <shenyang39@huawei.com>
      Reviewed-by: default avatarZhou Wang <wangzhou1@hisilicon.com>
      Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
      64dfe495