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Commit ffa05e45 authored by Laxman Dewangan's avatar Laxman Dewangan Committed by Stephen Warren
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ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt 



Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30
board dt files.
Set the parent clock of slink controller to PLLP and configure
clock to 100MHz.

Signed-off-by: default avatarLaxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent d065ab71
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