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Unverified Commit ff5a9017 authored by Trevor Wu's avatar Trevor Wu Committed by Mark Brown
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ASoC: mediatek: mt8195: enable apll tuner



Normally, the clock source of audio module is either 26M or APLL1/APLL2,
but APLL1/APLL2 are not the multiple of 26M.

In the patch, APLL1 and APLL2 tuners are enabled to handle sample rate
mismatch when the data path crosses two different clock domains.

Signed-off-by: default avatarTrevor Wu <trevor.wu@mediatek.com>
Link: https://lore.kernel.org/r/20220221055716.18580-1-trevor.wu@mediatek.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent b9afe038
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