pcie: dw: Allow several attempts to enable R/W access to R/O registers

commit 0b76731696c17e9bae9f61ba568fc73aeaa83244 from
https://source.codeaurora.org/external/autobsps32/linux



On S32G3 it was observed that in some situations (e.g. when both PCIe
controllers are enabled on S32G3), the first attempts to enable R/W access
to DBI R/O registers (from MISC_CONTROL_1) fail. In particular, for S32G3
the first 10 to 30 attempts fail, which cause the configuration of the
affected controller to be incomplete and subsequent probing of some
downstream devices (e.g. SSDs) fail.

Although this change affects driver code for all Designware based
controllers, in fact there is no functional change for those not
affected by the issue, as only one attempt is done to set register
MISC_CONTROL_1 (same in the original code).

Issue: ALB-8914

Signed-off-by: Ionut Vicovan <Ionut.Vicovan@nxp.com>
Signed-off-by: Zhantao Tang <zhantao.tang@windriver.com>