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Commit f77ebb24 authored by Fugang Duan's avatar Fugang Duan Committed by Greg Kroah-Hartman
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tty: serial: fsl_lpuart: correct the FIFO depth size



VF610/LS1021a/i.MX7ULP/i.MX8QXP reference manual describe the
TXFIFOSIZE/RXFIFOSIZE field as below.

000b - FIFO/Buffer depth = 1 dataword.
001b - FIFO/Buffer depth = 4 datawords.
010b - FIFO/Buffer depth = 8 datawords.
011b - FIFO/Buffer depth = 16 datawords.
100b - FIFO/Buffer depth = 32 datawords.
101b - FIFO/Buffer depth = 64 datawords.
110b - FIFO/Buffer depth = 128 datawords.
111b - FIFO/Buffer depth = 256 datawords. (Reserved for VF610)

So the FIFO depth should be: 0x1 << (val ? (val + 1) : 0)

Signed-off-by: default avatarFugang Duan <fugang.duan@nxp.com>
Link: https://lore.kernel.org/r/20190717051930.15514-6-fugang.duan@nxp.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 638341d5
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