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Unverified Commit f4ce428c authored by Sowjanya Komatineni's avatar Sowjanya Komatineni Committed by Mark Brown
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spi: tegra114: configure dma burst size to fifo trig level



Fixes: Configure DMA burst size to be same as SPI TX/RX trigger levels
to avoid mismatch.

SPI FIFO trigger levels are calculated based on the transfer length.
So this patch moves DMA slave configuration to happen before start
of DMAs.

Signed-off-by: default avatarSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent c4fc9e5b
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