PCI: keystone: Add PCI legacy interrupt support for AM654

commit e207b708950ae92a2eddef82bbd0b06cf3a26a08 from
git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git



Add PCI legacy interrupt support for AM654. AM654 has a single HW
interrupt line for all the four legacy interrupts INTA/INTB/INTC/INTD.
The HW interrupt line connected to GIC is a pulse interrupt whereas
the legacy interrupts by definition is level interrupt. In order to
provide level interrupt functionality to edge interrupt line, PCIe
in AM654 has provided IRQ_EOI register. When the SW writes to IRQ_EOI
register after handling the interrupt, the IP checks the state of
legacy interrupt and re-triggers pulse interrupt invoking the handler
again.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Achal Verma <a-verma1@ti.com>
Link: https://lore.kernel.org/linux-pci/20210325090026.8843-6-kishon@ti.com/


Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Xulin Sun <xulin.sun@windriver.com>