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Commit cc3e8f97 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
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clk: renesas: r8a779a0: Add Z0 and Z1 clock support



Add support for the Z0 and Z1 (Cortex-A76 Sub-system 0 and 1) clocks,
based on the existing support for Z clocks on R-Car Gen3.

As the offsets of the CPG_FRQCRB and CPG_FRQCRC registers on R-Car V3U
differ from the offsets on other R-Car Gen3 SoCs, we cannot use the
existing R-Car Gen3 support as-is.  For now, just make a copy, and
change the register offsets.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/2112e3bc870580c623bdecfeff8c74739699c610.1625219713.git.geert+renesas@glider.be
parent c11d7f51
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