net: macb: Use queue disable instead of tieoff in Versal suspend

commit f1cb7759312580ce1e61d581780ad7637d336b87 from
https://github.com/Xilinx/linux-xlnx.git

 xlnx_rebase_v6.6

Cadence IP version in Versal support individual queue disabling.
Make use of this new feature instead of queue tie-off. Background:
When WOL is enabled, we need RX enabled but DMA disabled because
there might be no access to memory for BDs or buffers due that
power domain being off. Also do not allocate tieoff descriptors for
Versal as they are no longer required.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
State: pending
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>