clk: renesas: r9a07g044: Add GbEthernet clock/reset

Add ETH{0,1} clock/reset entries to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210922155145.28156-5-biju.das.jz@bp.renesas.com


Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>