spi: spi-microchip-core: Add support for GPIO based CS

commit 2a5fdbd992b47244b4022aa9d06edec21709e979 from
https://github.com/linux4microchip/linux.git

 linux-6.6-mchp+fpga

The SPI "hard" controller within the PolarFire SoC is capable of
handling eight CS lines, but only one CS line is wired. Therefore, use
GPIO descriptors to configure additional CS lines.

Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Signed-off-by: harish h <harish.h@windriver.com>