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Commit b17e6840 authored by Badal Nilawar's avatar Badal Nilawar Committed by Anshuman Gupta
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drm/i915/gt: Update RC6 mask for mtl_drpc



It has been observed sometimes RC6 status register's unused bits are
being set by h/w, without affecting RC6 functionality therefore updating
the mask with used bits accordingly.
As mtl_drpc is debugfs function, removing MISSING_CASE from default case as
it doesn't make sense to panic (panic_on_warn=1) the CI system if register
is reporting unsupported state.

Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: default avatarBadal Nilawar <badal.nilawar@intel.com>
Reviewed-by: default avatarAnshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: default avatarAnshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230920090620.3255091-1-badal.nilawar@intel.com
parent 26a8e32e
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