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Commit a33095f4 authored by Like Xu's avatar Like Xu Committed by Paolo Bonzini
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KVM: x86/pmu: Update comments for AMD gp counters



The obsolete comment could more accurately state that AMD platforms
have two base MSR addresses and two different maximum numbers
for gp counters, depending on the X86_FEATURE_PERFCTR_CORE feature.

Signed-off-by: default avatarLike Xu <likexu@tencent.com>
Message-Id: <20220518132512.37864-2-likexu@tencent.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent d1c88a40
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