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Commit 97d21003 authored by mike.travis@hpe.com's avatar mike.travis@hpe.com Committed by Thomas Gleixner
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x86/platform/UV: Add check of TSC state set by UV BIOS



Insert a check early in UV system startup that checks whether BIOS was
able to obtain satisfactory TSC Sync stability.  If not, it usually
is caused by an error in the external TSC clock generation source.
In this case the best fallback is to use the builtin hardware RTC
as the kernel will not be able to set an accurate TSC sync either.

Signed-off-by: default avatarMike Travis <mike.travis@hpe.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarDimitri Sivanich <dimitri.sivanich@hpe.com>
Reviewed-by: default avatarRuss Anderson <russ.anderson@hpe.com>
Reviewed-by: default avatarAndrew Banman <andrew.abanman@hpe.com>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Andrew Banman <andrew.banman@hpe.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Bin Gao <bin.gao@linux.intel.com>
Link: https://lkml.kernel.org/r/20171012163202.406294490@stormcage.americas.sgi.com
parent 6c66350d
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