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Commit 88d4cea2 authored by Chris Park's avatar Chris Park Committed by Alex Deucher
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drm/amd/display: Port DCN30 420 logic to DCN32



[Why]
420 modes are limited by FMT buffer width of 4096
which requires multi-pipe support in form of ODM
combine.  If 420 modes have greater HActive than
4096, the DML logic should accomodate whether
it should be rejected, or ODM combine 2:1 or 4:1
is triggered accordingly.

[How]
FMT Buffer limit of 4096 in DCN32. Force ODM
combine depending on HActive and FMT Buffer limit.
Reject modes if TMDS 420 and above 4096.

Acked-by: default avatarWayne Lin <wayne.lin@amd.com>
Signed-off-by: default avatarChris Park <chris.park@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 37a0bad6
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