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Commit 8780cd6e authored by Witold Sadowski's avatar Witold Sadowski Committed by Ruiqiang Hao
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spi: cadence: Add clock and PHY configuration



commit fb1710d85c1a019a61523a9756d7b1e6594c02ee from
git@git.assembla.com:cavium/WindRiver.linux.git

Add internal clock divider, to change minicontroller
clock. Changing division ratio will change SPI clock frequency.
Apply PHY configuration changes, values are verified for
25 and 12.5 MHz

Change-Id: I2cbce21236cf5c16e6ed75cbb99c5cf4fa206ace
Signed-off-by: default avatarWitold Sadowski <wsadowski@marvell.com>
Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/kernel/linux/+/67415
Reviewed-by: default avatarChandrakala Chavva <cchavva@marvell.com>
Tested-by: default avatarSunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarRuiqiang Hao <Ruiqiang.Hao@windriver.com>
parent 71202360
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