mtd: spi-nor: Simplify odd address handling in read for dual parallel mode

commit  634a317469fe7d6b59d41d5cf5b59fc827864741 from
https://github.com/Xilinx/linux-xlnx.git xlnx_rebase_v5.10

During flash read in dual parallel mode, if the flash address is odd,
then the spi-nor core allocates a temporary buffer with length one more
that the requested length. In this buffer the driver copies data from the
flash, from an address one byte prior to the requested address(which is
nothing but the previous even address). The spi-nor core copies the data
from the temp. buffer to the actual buffer, by ignoring the first read
byte. At multiple instances, odd address read required special handling
as compared to even address read operation.
This patch updates the odd address handling logic, by eliminating the
buffer allocation & splitting the operation in to 2 read operation.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
State: pending
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>