mmc: octeontx2: cn96xx HS200-8wide-100MHz

commit ead73722576885c47e671eecbcbc9b1622a50bfd from
git@git.assembla.com:cavium/WindRiver.linux.git

Force MIO_EMM_DEBUG[CLK_ON]=1 for cn96 A0 as workaround
for a clock issue under investigation. irq handler must
check for RSP_STS[DMA_PEND], if set, teardown hung
transfer with EMM_DMA[VAL,DAT_NULL]=1 and return, allowing
a subsequent irq to occur on completion. Added the delay
on switch cmd, a precaution while testing. Store otx2
timing taps in hw format.

Change-Id: I889a580351c3533680a160ed50c52034a7e7d629
Signed-off-by: Peter Swain <pswain@cavium.com>
Reviewed-by: Chandrakala Chavva <Chandrakala.Chavva@cavium.com>
Signed-off-by: Sujeet Baranwal <sbaranwal@marvell.com>
Reviewed-on: https://sj1git1.cavium.com/8543


Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com>
Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com>
Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/kernel/linux/+/26908


Reviewed-by: Chandrakala Chavva <cchavva@marvell.com>
Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>