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Commit 74d57c85 authored by Teh Wen Ping's avatar Teh Wen Ping Committed by Liwei Song
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HSD #14015549958: arm64: dts: agilex5: Add clock dts entries for Agilex5

commit df7f0c94f14ae742db583a6cc0a15ed5b57fc0ea from
https://github.com/altera-opensource/linux-socfpga.git



Add clock dts entries for Intel SoCFPGA Agilex5 platform.

Signed-off-by: default avatarTeh Wen Ping <wen.ping.teh@intel.com>
Signed-off-by: default avatarLiwei Song <liwei.song@windriver.com>
parent ad186307
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