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Commit 6ccd692b authored by Radhey Shyam Pandey's avatar Radhey Shyam Pandey Committed by Vinod Koul
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dmaengine: xilinx_dma: Add Xilinx AXI MCDMA Engine driver support



Add support for AXI Multichannel Direct Memory Access (AXI MCDMA)
core, which is a soft Xilinx IP core that provides high-bandwidth
direct memory access between memory and AXI4-Stream target peripherals.
The AXI MCDMA core provides scatter-gather interface with multiple
independent transmit and receive channels. The driver supports
device_prep_slave_sg slave transfer mode.

Signed-off-by: default avatarRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Link: https://lore.kernel.org/r/1571763622-29281-7-git-send-email-radhey.shyam.pandey@xilinx.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent c2f6b67d
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