spi: cadence-quadspi: Tune PHY for SDR without DQS

commit 54d8290bac38967dea203294c088572d38ae20ba from
git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git



With SDR mode, the controller can only process at 1/4th of the ref
clock without PHY. So, add a SDR based tuning algorithm to enable
higher speed operations. Flash a known pattern to the last block of
the flash device, which will be later used to read back and compare.

Iterate through read_delay from 0 to 4, find first tuning point by
setting tx = 127. Find difference between rxlow and rxhigh and store
it in window1. Find second tuning point with read_delay incremented
by 1 and similarly calculate window2.

Compare window1 and window2 to finalise the optimal tuning point. Write
the final tuning point into PHY configuration register.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Tested-by: Prasanth Babu Mantena <p-mantena@ti.com>
Signed-off-by: Xulin Sun <xulin.sun@windriver.com>