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Commit 5d571068 authored by José Roberto de Souza's avatar José Roberto de Souza Committed by Lucas De Marchi
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drm/i915/tgl: Add and use new DC5 and DC6 residency counter registers



Tiger Lake has a new register offset for DC5 and DC6 residency counters.

v2:
  - Rename registers since they are not in the CSR memory range
    (requested by Anshuman)
  - Fix type (requested by Matthew)

Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarAnshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190726002412.5827-2-lucas.demarchi@intel.com
parent 01158da7
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