drm/i915: Disable tesselation clock gating on tgl A0

Disable TEDOP clock gating flow by programming 0x20A0[19] = 1

References: HSDES#1407928979
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200207155138.30978-1-mika.kuoppala@linux.intel.com