Skip to content
Commit 4dd5da65 authored by Minghuan Lian's avatar Minghuan Lian Committed by Marc Zyngier
Browse files

irqchip/ls-scfg-msi: Add LS1046a MSI support



LS1046a includes 4 MSIRs, each MSIR is assigned a dedicate GIC
SPI interrupt and provides 32 MSI interrupts. Compared to previous
MSI, LS1046a's IBS(interrupt bit select) shift is changed to 2 and
total MSI interrupt number is changed to 128.

The patch adds structure 'ls_scfg_msir' to describe MSIR setting and
'ibs_shift' to store the different value between the SoCs.

Signed-off-by: default avatarMinghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: default avatarHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent cb342168
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment