Skip to content
Commit 4b9f51d9 authored by Christophe JAILLET's avatar Christophe JAILLET Committed by Quanyang Wang
Browse files

clk: zynqmp: pll: Remove some dead code

commit  c01f2f2a82b701e631146f2a13f41ffab3507c14 from
https://github.com/Xilinx/linux-xlnx.git

 xlnx_rebase_v5.10

'clk_hw_set_rate_range()' does not return any error code and 'ret' is
known to be 0 at this point, so this message can never be displayed.

Remove it.

Fixes: 3fde0e16 ("drivers: clk: Add ZynqMP clock driver")
Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/71a9fed5f762a71248b8ac73c0a15af82f3ce1e2.1619867987.git.christophe.jaillet@wanadoo.fr


Reviewed-by: default avatarMichael Tretter <m.tretter@pengutronix.de>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarRajan Vaja <rajan.vaja@xilinx.com>
State: upstream ()
Signed-off-by: default avatarQuanyang Wang <quanyang.wang@windriver.com>
parent c4d89e9f
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment