arm64: dts: allwinner: a64: Add L2 cache nodes

Current kernels complain when booting on an A64 Soc:
....
[    1.904297] cacheinfo: Unable to detect cache hierarchy for CPU 0
....
Not a real biggie on this flat topology, but also easy enough to fix.

Add the L2 cache node and let each CPU point to it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>