PCI: keystone: Add workaround for Errata #i2037 (AM65x SR 1.0)

commit 0a5c54ed5ddee95e8455b780898483d77b1674fe from
git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git

Errata #i2037 in AM65x/DRA80xM Processors Silicon Revision 1.0
(SPRZ452D_July 2018_Revised December 2019 [1]) mentions when an
inbound PCIe TLP spans more than two internal AXI 128-byte bursts,
the bus may corrupt the packet payload and the corrupt data may
cause associated applications or the processor to hang.

The workaround for Errata #i2037 is to limit the maximum read
request size and maximum payload size to 128 Bytes. Add workaround
for Errata #i2037 here. The errata and workaround is applicable
only to AM65x SR 1.0 and later versions of the silicon will have
this fixed.

[1] -> http://www.ti.com/lit/er/sprz452d/sprz452d.pdf



Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Achal Verma <a-verma1@ti.com>
Link: https://lore.kernel.org/linux-pci/20210325090026.8843-7-kishon@ti.com/


Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Xulin Sun <xulin.sun@windriver.com>