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Commit 273361f5 authored by Ville Syrjälä's avatar Ville Syrjälä
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drm/i915/mtl: Fix voltage_level for cdclk==480MHz



Allow MTL to use voltage level 1 for 480MHz cdclk,
instead of the voltage level 2 that it's currently using.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-6-ville.syrjala@linux.intel.com


Reviewed-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
parent f23fe4d7
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