drm/i915/dg2: add TRANS_DP2_VFREQHIGH and TRANS_DP2_VFREQLOW

Add the registers for specifying the lower and higher 24 bits of the DP
2.0 pixel clock frequency in Hz.

Bspec: 53326
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9047f10318a30bc03ce8516ee3f5512437a95663.1629735412.git.jani.nikula@intel.com