crypto: octeontx2: add devlink option to set max_rxc_icb_cnt

commit c7e3804711de19eeaccad00e00cc65d44be50326 from
git@git.assembla.com:cavium/WindRiver.linux.git

In CN10KA B0 and CN10KB, maximum icb entries that RX can use,
can be configured through HW CSR. This patch adds option
to set max icb entries through devlink and also sets
max_rxc_icb_cnt to 0xc0 as default to match inline
inbound peak performance compared to other chip versions.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Change-Id: I4f075c9a18d6b281da21af460095e694b055bbce
Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/kernel/linux/+/100494
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
Reviewed-by: Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>