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Commit 1bc66054 authored by Andrew Pinski's avatar Andrew Pinski Committed by Ruiqiang Hao
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arm64: Add workaround for Cavium erratum 36890



commit 87b12b082cc3f7f1d7aca38f16910179d9ee34f6 from
git@git.assembla.com:cavium/WindRiver.linux.git

On all ThunderX T88 passes, all OcteonTX T81 and T83 passes,
and some OcteonTX2 passes (some T96xx and F95XX), the "dc zva"
instruction has issues where old data would be in the cache in
some cases.  This happens when there are two different VAs
pointing to the same PA; even with different asids.

Change-Id: Ife8671af41822c4d6d6e4e7a24d005ee29d9dd17
Signed-off-by: default avatarAndrew Pinski <apinski@marvell.com>
Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/kernel/linux/+/26578


Reviewed-by: default avatarSunil Kovvuri Goutham <Sunil.Goutham@cavium.com>
Tested-by: default avatarSunil Kovvuri Goutham <Sunil.Goutham@cavium.com>
Signed-off-by: default avatarRuiqiang Hao <Ruiqiang.Hao@windriver.com>
parent 7b96d964
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