octeontx2-bphy-netdev: cnf10k: Fix incorrect PTP clock frequency.

commit c52b9f7f0015487e1968d26d22aaf2c7452e3f9b from
git@git.assembla.com:cavium/WindRiver.linux.git

The PTP clock frequency is hard coded to 125MHz in CNF10K. This was
taken from CNF95XX, but on CNF10K the external PTP clock source is not
present at the moment. So SCLK is used as PTP clock. This needs to be
fixed such that PTP clock information is read from device tree node
instead of hard coding.

Fixes: 6e5e407186b6("octeontx2-bphy-netdev: cnf10k: 1-step PTP and slave
		    support.")
Change-Id: I0f9dfd472dc50f385f30625f10042f7b24a41717
Signed-off-by: Rakesh Babu Saladi <rsaladi2@marvell.com>
Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/kernel/linux/+/80083
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
Reviewed-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>