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Commit 117e7dc6 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
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clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times



SDM845 downstream uses non-default values for GDSC internal waits.
Program them accordingly to avoid surprises.

Fixes: 81351776 ("clk: qcom: Add display clock controller driver for SDM845")
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # OnePlus 6
Link: https://lore.kernel.org/r/20240103-topic-845gdsc-v1-1-368efbe1a61d@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 6624b25c
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