iio: adc: meson: fix core clock enable/disable moment
Enable core clock at probe stage and disable it at remove stage. Core clock is responsible for turning on/off the entire SoC module so it should be on before the first module register is touched and be off at very last moment. Fixes: 3adbf342 ("iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs") Signed-off-by:George Stark <gnstark@sberdevices.ru> Link: https://lore.kernel.org/r/20230721102413.255726-2-gnstark@sberdevices.ru Cc: <stable@vger.kernel.org> Signed-off-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com>
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