clk: Allow clock defaults to be set also during re-reloc state
The earlier commit f4fcba5c ("clk: implement clk_set_defaults()") which introduced the functionality for setting clock defaults such as rates and parents will skip the processing when executing in a re-reloc state. This for example can prevent the assigning of clock parents when running in SPL code. Go ahead and remove this limitation. Signed-off-by:Andreas Dannenberg <dannenberg@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Loading
Please sign in to comment