Skip to content
Commit d8af3933 authored by Michal Sojka's avatar Michal Sojka Committed by Tom Rini
Browse files

mtd: nand: omap_gpmc: Make ready/busy pins configurable



Commit fb384c47 introduced the use of
WAIT0 pin for determining whether the NAND is ready or not. This only
works if all NAND chips are connected to WAIT0. If some chips are
connected to the other available pin WAIT1, nand_wait() does not really
wait and prints a WARN_ON message.

This patch allows the board to provide configuration of which chip is
connected to which WAITx signal. For example, one can define in
include/configs/foo.h:

    #define CONFIG_NAND_OMAP_GPMC_WSCFG     0,0,1,1

This would mean that chips using to CS0 and 1 are connected to WAIT0 and
chips with CS2 and 3 are connected to WAIT1.

Signed-off-by: default avatarMichal Sojka <sojka@merica.cz>
Acked-by: default avatarStefan Roese <sr@denx.de>
Tested-by: default avatarMichal Vokáč <michal.vokac@comap.cz>

Cc: Tom Rini <trini@ti.com>
parent 22b7509e
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment