Skip to content
Commit d491dc09 authored by JC Kuo's avatar JC Kuo Committed by Tom Warren
Browse files

t210: do not enable PLLE and UPHY PLL HW PWRSEQ



This commit removes the programming sequence that enables PLLE and UPHY
PLL hardware power sequencers. Per TRM, boot software should enable PLLE
and UPHY PLLs in software controlled power-on state and should power
down PLL before jumping into kernel or the next stage boot software.

Adds call to board_cleanup_before_linux to facilitate this.

Signed-off-by: default avatarJC Kuo <jckuo@nvidia.com>
Signed-off-by: default avatarTom Warren <twarren@nvidia.com>
Acked-by: default avatarStephen Warren <swarren@nvidia.com>
parent 9eb15cbe
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment