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Commit ad005d8a authored by Duy Nguyen's avatar Duy Nguyen Committed by Marek Vasut
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dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions

Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
V4M (R8A779H0) SoC.

The current version is imported from:
https://lore.kernel.org/linux-renesas-soc/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be/



Signed-off-by: default avatarDuy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: default avatarHai Pham <hai.pham.ud@renesas.com>
parent d7aaaf42
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