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Commit acb83bb3 authored by Michal Simek's avatar Michal Simek
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arm: zynq: Setup non zero SPL FIT load address



Default setup is 0 which is incorrect place because it points to OCM
which is allocated for SPL only in our case.
Use address in DDR.

Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent dd610e61
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