phy: cadence: Sierra: Update single link PCIe register configuration
Add single link PCIe register configurations for no SSC and internal SSC. Also, add missing PMA lane registers for external SSC. Signed-off-by:Swapnil Jakhade <sjakhade@cadence.com> Signed-off-by:
Aswath Govindraju <a-govindraju@ti.com>
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