Skip to content
Commit 960efc5e authored by Swapnil Jakhade's avatar Swapnil Jakhade Committed by Tom Rini
Browse files

phy: cadence: Sierra: Update single link PCIe register configuration 



Add single link PCIe register configurations for no SSC and internal
SSC. Also, add missing PMA lane registers for external SSC.

Signed-off-by: default avatarSwapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: default avatarAswath Govindraju <a-govindraju@ti.com>
parent f0cb8096
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment