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Commit 78773f14 authored by Marek Vasut's avatar Marek Vasut
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mmc: matsushita-common: Handle Renesas div-by-1



On the Renesas version of the IP, the /1 divider is realized by
setting the clock register [7:0] to 0xff instead of setting bit
10 of the register. Check the quirk and handle accordingly.

Signed-off-by: default avatarMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
parent f98833db
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