pcie: designware: mvebu: fix reset release polarity
The dm_gpio_set_value() routine sets signal logical level, with GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1 (asserted), while reset inactive value is 0 (de-asserted). Fix the reset toggle code to set the correct reset logic value. Reported-by:Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by:
Baruch Siach <baruch@tkos.co.il> Reviewed-by:
Stefan Roese <sr@denx.de> Signed-off-by:
Stefan Roese <sr@denx.de>
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