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Commit 59e1bdd4 authored by Michal Simek's avatar Michal Simek
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arm64: zynqmp: Setup clock for DP and DPDMA



Clocks are coming from shared HW design where these frequencies should be
aligned with PLL setup.

Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/04454c50d0d13e450976942085d763ab5aa38f98.1645629459.git.michal.simek@xilinx.com
parent c36dc244
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