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Commit 52c2c97e authored by Stefan Agner's avatar Stefan Agner Committed by Stefano Babic
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ARM: vf610: ddrmc: fix initialization completion detection



The CR80 register has multiple interrupt bits, the code is supposed
to check bit 8 but instead uses a logical and. In most cases this
probably did not affect real operations since at that stage typically
none of the other bits are set.

Signed-off-by: default avatarStefan Agner <stefan.agner@toradex.com>
Acked-by: default avatarMarcel Ziswiler <marcel.ziswiler@toradex.com>
parent b77e368f
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