Skip to content
Commit 4e97e257 authored by Patrice Chotard's avatar Patrice Chotard Committed by Tom Rini
Browse files

clk: clk_stm32fx: add clock configuration for mmc usage



MMC block needs 48Mhz source clock, for that we choose
to select the SAI PLL.
Update also stm32_clock_get_rate() to retrieve the MMC
clock source needed in MMC driver.

STM32F4 uses a different RCC variant than STM32F7. For STM32F4
sdmmc clocks bit are located into dckcfgr register whereas there
are located into dckcfgr2 registers on STM32F7.
In both registers, bits CK48MSEL and SDMMC1SEL are located at
the same position.

Signed-off-by: default avatarChristophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: default avatarPatrice Chotard <patrice.chotard@st.com>
Reviewed-by: default avatarVikas Manocha <vikas.manocha@st.com>
parent 928954fe
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment