Skip to content
Commit 499b8475 authored by Matthias Schiffer's avatar Matthias Schiffer Committed by Daniel Schwierzeck
Browse files

MIPS: fix mips_cache fallback without __builtin_mips_cache



The "R" constraint supplies the address of an variable in a register. Use
"r" instead and adjust asm to supply the content of addr in a register
instead.

Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations")
Signed-off-by: default avatarMatthias Schiffer <mschiffer@universe-factory.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
parent deff6fb3
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment