ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bit
commit 20c89a28548cdab11f88d2ec8936344af0686a1e upstream. WL phase correcion stage is failing while using bus_width of 16bit, not to be fix this stage is un-necessary when working with bus_width of 16 bit. Signed-off-by:Moti Buskila <motib@marvell.com> Reviewed-by:
Kostya Porotchkin <kostap@marvell.com> Signed-off-by:
Marek Behún <marek.behun@nic.cz> Tested-by:
Chris Packham <chris.packham@alliedtelesis.co.nz>
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