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Commit 3f352704 authored by Conor Dooley's avatar Conor Dooley Committed by Leo Yu-Chi Liang
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riscv: dts: fix the mpfs's reference clock frequency



The initial devicetree for PolarFire SoC incorrectly created a fixed
frequency clock in the devicetree to represent the msspll, but the
msspll is not a fixed frequency clock. The actual reference clock on a
board is either 125 or 100 MHz, 125 MHz in the case of the icicle kit.
Swap the incorrect representation of the msspll out for the actual
reference clock.

Fixes: dd4ee416 ("riscv: dts: Add device tree for Microchip Icicle Kit")
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarLeo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: default avatarPadmarao Begari <padmarao.begari@microchip.com>
parent 4e405c68
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