sunxi: sun4i: add missing sdelay() to clock_init_safe()
This delay is required after switching the clock source. See “A20 Reference manual v1.4” Page 50 / section “1.5.4.16. CPU/AHB/APB0 CLOCK RATIO”: “If the clock source is changed, at most to wait for 8 present running clock cycles.” This is already implemented in clock_set_pll1(), but was still missing in clock_init_safe(). Signed-off-by:Ludwig Kormann <ludwig.kormann@ict42.de> Reviewed-by:
Andre Przywara <andre.przywara@arm.com>
Loading
Please register or sign in to comment