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Commit 2303bff7 authored by Paul Burton's avatar Paul Burton Committed by Joe Hershberger
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net: pch_gbe: Add cache maintenance



On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is
present. When there is no IOCU we need to writeback or invalidate the
data caches at appropriate points. Perform this cache maintenance in
the pch_gbe driver which is used on the MIPS Boston development board.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Reviewed-by: default avatarBin Meng <bmeng.cn@gmail.com>
Tested-by: default avatarBin Meng <bmeng.cn@gmail.com>
Signed-off-by: default avatarDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
Acked-by: default avatarJoe Hershberger <joe.hershberger@ni.com>
parent 52e727c8
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